Problem 55-7
Source: Problem 9 - List of RLC Problems - Discipline
Electrical Circuits of the School of Engineering - UFRGS - 2011 - Prof. Dr. Valner Brusamarello.
In the circuit shown in the Figure 55-7.1, we have I = 20∠0° mA, R1 = 1,2 kΩ, - jXC1 = - j1,8 kΩ,
jXL1 = j1,2kΩ and jXL2 = jXL3 = j2,4 kΩ. Determine:
a) the values of I1 and I2:
b) the values of VaT and VdT.
Solution of the Problem 55-7
Item a
To calculate the currents I1 and I2, we chose to use a current divider. In this way, for I1:
I1 = I [- jXC1 / (- jXC1 + jXL1)]
Substituting for numeric values:
I1 = 20∠0° [- j1.8 kΩ / (- j1.8 kΩ + j1.2 kΩ )]
Performing the calculation:
I1 = 60∠0° mA
And to I2:
I2 = I [jXL1 / (- jXC1 + jXL1)]
Substituting for numeric values:
I2 = 20∠0° [j1.2 kΩ / (- j1.8 kΩ + j1.2 kΩ )]
Performing the calculation:
I2 = - 40∠0° mA
The negative sign of I2, means that the direction of the current is
contrary to that indicated in the figure of the circuit.
Item b
To find the value of VdT, we must calculate the parallel of
XL2 and XL3.
jXeq = j2.4 x j2.4 / (j2.4 + j2.4 ) = j1.2 kΩ
Now applying the Ohm's law:
VdT = jXeq I = j1.2 x 20∠0° = 24∠90° V
Note that j1.2 = 1.2∠90°. To calculate VaT, we chose
to find the equivalent impedance of the whole circuit and multiply by the
value of I (Ohm's law). For this, it is necessary to calculate the value of
the parallel between XL1 and XC1. Assim:
ZLC = j1.2 x (-j 1.8) / (j1.2 - j1.8) = j 3.6 kΩ
Then summing all the impedances between the points a-T, we obtain:
Zeq = 1.2 + j3.6 + j1.2 = 1.2 + j 4.8 kΩ
As we can see, the circuit has inductive predominance. We can write
Zeq = 4.95∠75.96° in polar format. Then the value of VaT will be:
VaT = I Zeq = 20∠0° x 4.95∠75.96°
Finally, performing the calculation:
VaT = 99∠75.96° V
In the Figure 55-7.2 we see the graph of currents and voltages in the
circuit. Notice that VR is in phase with I, because it is
the voltage on the resistor R1. VdT, that
is the tension over L2 and L3, is advanced by
90° in relation to the current I that flows through them. In its turn,
Vbc is advanced by 90° in relation to the current
I1 that circulating by
L1 and, at the same time, is delayed by 90° in relation
to I2, current that is circulating by C1.
And VaT is the phasor sum between
VR and Vbc + VdT. Notice, in the
chart, how all the phasors are perfectly in agreement with the circuit.